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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order this document by MC145106/D
PLL Frequency Synthesizer
CMOS
The MC145106 is a phase-locked loop (PLL) frequency synthesizer constructed in CMOS on a single monolithic structure. This synthesizer finds applications in such areas as CB and FM transceivers. The device contains an oscillator/amplifier, a 210 or 211 divider chain for the oscillator signal, a programmable divider chain for the input signal, and a phase detector. The MC145106 has circuitry for a 10.24 MHz oscillator or may operate with an external signal. The circuit provides a 5.12 MHz output signal, which can be used for frequency tripling. A 29 programmable divider divides the input signal frequency for channel selection. The inputs to the programmable divider are standard ground-to-supply binary signals. Pull-down resistors on these inputs normally set these inputs to ground enabling these programmable inputs to be controlled from a mechanical switch or electronic circuitry. The phase detector may control a VCO and yields a high level signal when input frequency is low, and a low level signal when input frequency is high. An out-of-lock signal is provided from the on-chip lock detector with a "0" level for the out-of-lock condition. * * * * * * * * * * * Single Power Supply Wide Supply Range: 4.5 to 12 V Provision for 10.24 MHz Crystal Oscillator 5.12 MHz Output Programmable Division Binary Input Selects up to 29 On-Chip Pull-Down Resistors on Programmable Divider Inputs Selectable Reference Divider, 210 or 211 (Including / 2) Three-State Phase Detector See Application Note AN535 and Article Reprint AR254 Chip Complexity: 880 FETs or 220 Equivalent Gates See the MC145151-2 and MC145152-2 for Higher Performance and Added Flexibility
18
MC145106
P SUFFIX PLASTIC DIP CASE 707
1
20 1
DW SUFFIX SOG PACKAGE CASE 751D
ORDERING INFORMATION
MC145106P MC145106DW Plastic DIP SOG Package
BLOCK DIAGRAM
OSCout / 2out /2 REFERENCE DIVIDE 29 OR 210 PHASE DETECTOR fin DIVIDE-BY-N COUNTER 29 - 1 LD FS Detout
OSCin
P0 P1
P2
P3 P4
P5
P6
P7 P8
REV 3 1/98
(c) Motorola, Inc. 1998 MC145106
MOTOROLA
1
PIN ASSIGNMENTS PLASTIC DIP
VDD fin OSCin OSCout 1 2 3 4 5 6 7 8 9 18 17 16 15 14 13 12 11 10 VSS P0 P1 P2 P3 P4 P5 P6 P7
B 2out
FS LD P8
Detout
SOG PACKAGE
VDD fin OSCin OSCout 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 VSS P0 NC P1 P2 P3 P4 NC P5 P6
B 2out
FS Detout LD P8 P7
NC = NO CONNECTION
MAXIMUM RATINGS (Voltages Referenced to VSS)
Parameter DC Supply Voltage Input Voltage, All Inputs DC Input Current, per Pin Operating Temperature Range Storage Temperature Range Symbol VDD Vin I TA Tstg Value - 0.5 to + 12 - 0.5 to VDD + 0.5 10 - 40 to + 85 - 65 to + 150 Unit V V mA C C This device contains circuitry to protect the inputs against damage due to high static voltages or electric fields; however, it is advised that normal precautions be taken to avoid application of any voltage higher than maximum rated voltages to this high impedance circuit. For proper operation it is recommended that Vin and Vout be constrained to the range VSS (Vin or Vout) VDD.
MOTOROLA
MC145106 2
ELECTRICAL CHARACTERISTICS (TA = 25C Unless Otherwise Stated, Voltages Referenced to VSS)
Characteristic Ch ii Power Supply Voltage Range Supply Current Symbol S bl VDD IDD VDD Vdc -- 5.0 10 12 5.0 10 12 5.0 10 12 5.0 10 12 5.0 10 12 "1" Level 5.0 10 12 5.0 10 12 "0" Level 5.0 10 12 5.0 10 12 IOH Source 5.0 10 12 IOL 5.0 10 12 -- -- Rin 5.0 10 12 Cin IOZ -- 5.0 10 12 4.5 12 4.5 12 -- -- -- -- -- -- -- 0 0 0.1 0.1 1.0 0.5 -- 6.0 -- -- -- -- -- -- -- -- -- -- -- 1.0 1.0 1.0 4.0 4.0 10.24 10.24 pF A - 0.7 - 1.1 - 1.5 0.9 1.4 2.0 1.0 1.5 - 1.4 - 2.2 - 3.0 1.8 2.8 4.0 0.2 0.3 -- -- -- -- -- -- -- -- V p-p Sine M All Types Min 4.5 -- -- -- -- -- -- 3.5 7.0 8.4 - 5.0 - 15 - 20 -- -- -- -- -- -- 7.5 22.5 30 - 2.0 - 6.0 - 9.0 2.0 6.0 9.0 Typ* -- 6 20 28 -- -- -- -- -- -- - 20 - 60 - 80 -- -- -- -- -- -- 30 90 120 - 6.0 - 25 - 37 6.0 25 37 Max 12 10 35 50 1.5 3.0 3.6 -- -- -- - 50 - 150 - 200 - 0.3 - 0.3 - 0.3 0.3 0.3 0.3 75 225 300 - 15 - 62 - 92 15 62 92 mA A Unit Ui V mA
Input Voltage
"0" Level
VIL
V
"1" Level
VIH
Input Current FS, Pull-Up Resistor Source Current) (P0 - P8)
"0" Level
Iin
(FS)
(P0 - P8, Pull-Down Resistor Sink Current)
(OSCin, fin)
(OSCin, fin)
"1" Level
Output Drive Current (VO = 4.5 V) (VO = 9.5 V) (VO = 11.5 V) (VO = 0.5 V) (VO = 0.5 V) (VO = 0.5 V) Input Amplitude (fin @ 4.0 MHz) (OSCin @ 10.24 MHz) Input Resistance (OSCin, fin)
Sink
--
Input Capacitance (OSCin, fin) Three-State Leakage Current (Detout) Input Frequency (- 40 to + 85C) Oscillator Frequency (- 40 to + 85C)
fin OSCin
MHz MHz
*Data labelled "Typ" is not to be used for design purposes but is intended as an indication of the IC's potential performance.
MC145106 3
MOTOROLA
TYPICAL CHARACTERISTICS*
25 V DD , POSITIVE POWER SUPPLY (V) 25
+ 25C 15 + 85C 10 - 40C
V DD , SUPPLY VOLTAGE (V)
20
20 + 25C + 85C 10
15
- 40C
5.0
5.0
0
0
10
20 30 fin, MAXIMUM FREQUENCY (MHz)
40
50
0
0
10
20 30 40 OSCin, MAXIMUM FREQUENCY (MHz)
50
Figure 1. Maximum Divider Input Frequency versus Supply Voltage
Figure 2. Maximum Oscillator Input Frequency versus Supply Voltage
* Data labelled "Typ" is not to be used for design purposes but is intended as an indication of the IC's potential performance.
TRUTH TABLE
Selection P8 0 0 0 0 0

LD Lock Detector (PDIP, SOG -- Pin 8)
P2 0 0 0 0 1

P7 0 0 0 0 0

P6 0 0 0 0 0

P5 0 0 0 0 0

P4 0 0 0 0 0

P3 0 0 0 0 0

P1 0 0 1 1 0

P0 0 1 0 1 0

Divide by N 2* 3* 2 3 4

LD is high when loop is locked, pulses low when out-of- lock. Detout (PDIP, SOG -- Pin 7) Signal for control of external VCO, output high when fin/N is less than the reference frequency; output low when fin/N is greater than the reference frequency. Reference frequency is the divided down oscillator -- input frequency typically 5.0 or 10 kHz. NOTE Phase Detector Gain = VDD/4. FS Reference Oscillator Frequency Division Select (PDIP, SOG -- Pin 6) When using 10.24 MHz OSC frequency, this control selects 10 kHz, a "0" selects 5.0 kHz. / 2out (PDIP, SOG -- Pin 5) Reference OSC frequency divided by 2 output; when using 10.24 MHz OSC frequency, this output is 5.12 MHz for frequency tripling applications. VDD Positive Power Supply (PDIP, SOG -- Pin 1) VSS Ground (PDIP -- Pin 18, SOG -- Pin 20)
0

1

1

1

1

1

1

1

1

255

1
1
1
1
1
1
1
1
1
511
1: Voltage level = VDD. 0: Voltage level = 0 or open circuit input. * The binary setting of 00000000 and 00000001 on P8 to P0 results in a 2 and 3 division which is not in the 2N - 1 sequence. When pin is not connected the logic signal on that pin can be treated as a "0".
PIN DESCRIPTIONS
P0 - P8 Programmable Inputs (PDIP -- Pins 17 - 9; SOG -- Pins 19, 17 - 14, 12 - 9) Programmable divider inputs (binary). fin Frequency Input (PDIP, SOG -- Pin 2) Frequency input to programmable divider (derived from VCO). OSCin, OSCout Oscillator Input and Oscillator Output (PDIP, SOG -- Pins 3, 4) Oscillator/amplifier input and output terminals.
MOTOROLA
MC145106 4
PLL SYNTHESIZER APPLICATIONS
The MC145106 is well suited for applications in CB radios because of the channelized frequency requirements. A typical 40 channel CB transceiver synthesizer, using a single crystal reference, is shown in Figure 3 for receiver IF values of 10.695 MHz and 455 kHz. In addition to applications in CB radios, the MC145106 can be used as a synthesizer for several other systems. Various frequency spectrums can be achieved through the use of proper offset, prescaling, and loop programming techniques. In general, 300 - 400 channels can be synthesized using a single loop, with many additional channels available when multiple loop approaches are employed. Figures 4 and 5 are examples of some possibilities. In the aircraft synthesizer of Figure 5, the VHF loop (top) will provide a 50 kHz, 360 channel system with 10.7 MHz R/T offset when only the 11.0500 MHz (transmit) and
12.1200 MHz (receive) frequencies are provided to mixer #1. When these signals are provided with crystal oscillators, the result is a three crystal 360 channel, 50 kHz step synthesizer. When using the offset loop (bottom) in Figure 5 to provide the indicated injection frequencies for mixer #1 (two for transmit and two for receive) 360 additional channels are possible. This results in a 720-channel, 25 kHz step synthesizer which requires only two crystals and provides R/T offset capability. The receive offset value is determined by the 11.31 MHz crystal frequency and is 10.7 MHz for the example. The VHF marine synthesizer in Figure 4 depicts a single loop approach for FM transceivers. The VCO operates on frequency during transmit and is offset downward during receive. The offset corresponds to the receive IF (10.7 MHz) for channels having identical receive/transmit frequencies (simplex), and is (10.7 - 4.6 = 6.1) MHz for duplex channels. Carrier modulation is introduced in the loop during transmit.
/ 29/210 OSC 10.24 MHz /2 MC145106 PROGRAMMABLE DIVIDER 5.0 kHz PHASE DETECTOR
LD
LOOP FILTER
VCO
BUFFER
26.965 - 27.405 MHz (TRANSMIT) 26.510 - 26.950 MHz (RECEIVE)
VDD SWITCH WAFERS
GND
R/T BUFFER MIXER
1.365 - 1.805 MHz (TRANSMIT) 0.91 - 1.35 MHz (RECEIVE) 25.6 MHz
10.24 MHz TO RECEIVER 2ND MIXER
16.270 - 16.710 MHz
RECEIVER 1ST LOCAL OSC SIGNAL
X5
MIXER
Figure 3. Single Crystal CB Synthesizer Featuring On-Frequency VCO During Transmit
MC145106 5
MOTOROLA
GND
VDD
LOCK DETECT
REF OSC 5.12 MHz (10.24 MHz)
/2
29, 210 DIVIDER 2.5 kHz (5.0 kHz) PHASE DETECTOR LOOP FILTER VCO AND BUFFER
TRANSMIT RANGE 156.025 - 157.425 MHz *157.4 RECEIVER L.O. RANGE 145.575 - 152.575 MHz *151.3
MC145106 / N 29 - 1 TRANSMIT MODULATION CIRCUIT
PROGRAMMABLE INPUTS N = 97 TO 153 *152
MODULATION
BUFFER FILTER
0.2425 - 0.3825 (0.4850 - 0.7650) *0.3800
MIXER
/ 10 (/ 5)
TRIPLER
15.36 (30.72) TRANSMIT RECEIVE
RECEIVE OFFSET OSCILLATOR
NOTES: * Receiver IF = 10.7 MHz. * Low Side Injection. * Duplex Offset = 4.6 MHz. * Step Size = 25 kHz. * Frequencies in MHz unless noted. * Values in parentheses are for a 5.0 kHz reference frequency. * Example frequencies for Channel 28 shown by *. #Can be eliminated by adding 184 to / N for Duplex Channels.
SIMPLEX 14.29 (28.58)
DUPLEX 14.75# (29.50)
Figure 4. VHF Marine Transceiver Synthesizer
MOTOROLA
MC145106 6
LOCK DETECT
REF OSC 10.24 MHz
/2
29, 210 DIVIDER 5.0 kHz MC145106 / N 29 - 1 PHASE DETECTOR LOOP FILTER VCO AND BUFFER
TRANSMIT 118.000 - 135.975 MHz (25 kHz STEPS) RECEIVE 128.700 - 146.675 MHz
VHF LOOP PROGRAMMING 750 kHz - 2545 kHz N = 150 - 509
VDD
GND
MIXER #1 LOCK DETECT
/ 10 TRANSMIT 11.0500 MHz 11.0525 MHz RECEIVE 12.1200 MHz 12.1225 MHz
5.12 MHz
REF OSC AND / 2
29, 210 DIVIDER 2.5 kHz MC145106 / N 29 - 1 PHASE DETECTOR LOOP FILTER VCO AND BUFFER
1 0100 010 OFFSET LOOP PROGRAMMING 810 kHz - 812.5 kHz N = 324 - 325
VDD
GND TRANSMIT 10.24 MHz RECEIVE 11.31 MHz (SELECT FREQUENCY TO GIVE DESIRED R/T OFFSET)
MIXER #2
AMP OSC
Figure 5. VHF Aircraft 720 Channel Two Crystal Frequency Synthesizer
MC145106 7
MOTOROLA
PACKAGE DIMENSIONS
P SUFFIX PLASTIC DIP (DUAL IN-LINE PACKAGE) CASE 707-02
NOTES: 1. POSITIONAL TOLERANCE OF LEADS (D), SHALL BE WITHIN 0.25 (0.010) AT MAXIMUM MATERIAL CONDITION, IN RELATION TO SEATING PLANE AND EACH OTHER. 2. DIMENSION L TO CENTER OF LEADS WHEN FORMED PARALLEL. 3. DIMENSION B DOES NOT INCLUDE MOLD FLASH. MILLIMETERS MIN MAX 22.22 23.24 6.10 6.60 3.56 4.57 0.36 0.56 1.27 1.78 2.54 BSC 1.02 1.52 0.20 0.30 2.92 3.43 7.62 BSC 0 15 0.51 1.02 INCHES MIN MAX 0.875 0.915 0.240 0.260 0.140 0.180 0.014 0.022 0.050 0.070 0.100 BSC 0.040 0.060 0.008 0.012 0.115 0.135 0.300 BSC 0 15 0.020 0.040
18 1
10
B
9
A C L
N F H G D
SEATING PLANE
K M J
DIM A B C D F G H J K L M N
DW SUFFIX SOG (SMALL OUTLINE GULL-WING) PACKAGE CASE 751D-04 -A-
20 11 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.150 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.13 (0.005) TOTAL IN EXCESS OF D DIMENSION AT MAXIMUM MATERIAL CONDITION. DIM A B C D F G J K M P R MILLIMETERS MIN MAX 12.65 12.95 7.40 7.60 2.35 2.65 0.35 0.49 0.50 0.90 1.27 BSC 0.25 0.32 0.10 0.25 0_ 7_ 10.05 10.55 0.25 0.75 INCHES MIN MAX 0.499 0.510 0.292 0.299 0.093 0.104 0.014 0.019 0.020 0.035 0.050 BSC 0.010 0.012 0.004 0.009 0_ 7_ 0.395 0.415 0.010 0.029
-B-
1 10
10X
P 0.010 (0.25)
M
B
M
20X
D
M
0.010 (0.25)
TA
S
B
J
S
F R C -T-
18X SEATING PLANE X 45 _
G
K
M
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MOTOROLA
MC145106/D MC145106 8

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